This invention relates to a semiconductor integrated circuit such as a semiconductor memory or the like, and particularly to an output buffer circuit having a bootstrap circuit.
An output buffer circuit may have a bootstrap circuit. The bootstrap circuit is provided to output data at high speed and enhance driving capability. The output buffer circuit having the bootstrap circuit has been disclosed in Japanese Patent Application Laid-Open Publication No. 161921/84.
The disclosed output buffer circuit is provided with a bootstrap capacitor. When the bootstrap capacitor is discharged, a potential applied to the gate of an output transistor is raised. A power source potential supplied to the drain of the output transistor is supplied to other circuit through the source of the output transistor without a reduction in the power source potential with an increase in the potential applied to the gate of the output transistor.
There has recently been a demand for the appearance of an output buffer circuit which is simple in circuit configuration and capable of outputting data at high speed.